<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>CS 61C: Computer Architecture on</title><link>https://notes.bencuan.me/cs61c/</link><description>Recent content in CS 61C: Computer Architecture on</description><generator>Hugo</generator><language>en</language><atom:link href="https://notes.bencuan.me/cs61c/index.xml" rel="self" type="application/rss+xml"/><item><title>Number Representation</title><link>https://notes.bencuan.me/cs61c/Number-Representation/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Number-Representation/</guid><description>&lt;h2 id="bases-and-bits"&gt;
 Bases and Bits
 &lt;a class="anchor" href="#bases-and-bits"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;In Arabic numerals, we use &lt;strong&gt;base 10&lt;/strong&gt;. So for example, $533 = 5 \times 10^2 + 3 \times 10^1 + 3 \times 10^0$.&lt;/p&gt;
&lt;p&gt;There are also other common bases, where we multiply each digit by a different value. The most common are &lt;strong&gt;binary (base 2), octal (base 8), and hexadecimal (base 16).&lt;/strong&gt;&lt;/p&gt;
&lt;blockquote&gt;
&lt;p&gt;💡 &lt;strong&gt;Bits are bits.&lt;/strong&gt; They can represent literally whatever you want!&lt;/p&gt;
&lt;/blockquote&gt;
&lt;blockquote&gt;
&lt;p&gt;🔥 With $n$ bits, we can represent $2^n$ different things!&lt;/p&gt;</description></item><item><title>Intro to C</title><link>https://notes.bencuan.me/cs61c/Intro-to-C/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Intro-to-C/</guid><description>&lt;p&gt;![[/cs61c/img/Intro-to-C/Untitled.png]]&lt;/p&gt;
&lt;h2 id="c-the-universal-assembly-language"&gt;
 C: The Universal Assembly Language
 &lt;a class="anchor" href="#c-the-universal-assembly-language"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;&lt;strong&gt;What&amp;rsquo;s the big deal with C?&lt;/strong&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;strong&gt;It&amp;rsquo;s wildly popular.&lt;/strong&gt; C and its derivatives have been around for 40+ years and won&amp;rsquo;t be going away anytime soon.&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;It&amp;rsquo;s highly configurable.&lt;/strong&gt; Whatever you want to do, C can probably do it.&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;It&amp;rsquo;s good if you have limited memory.&lt;/strong&gt; Microprocessors are best used when running C because memory allocation is a must when you only have like 4kb of RAM.&lt;/li&gt;
&lt;/ul&gt;
&lt;h3 id="compilation"&gt;
 Compilation
 &lt;a class="anchor" href="#compilation"&gt;#&lt;/a&gt;
&lt;/h3&gt;
&lt;p&gt;C compilers map programs directly into &lt;strong&gt;machine code&lt;/strong&gt; (bitstrings). In comparison:&lt;/p&gt;</description></item><item><title>Memory, Pointers, Addresses</title><link>https://notes.bencuan.me/cs61c/Memory-Pointers-Addresses/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Memory-Pointers-Addresses/</guid><description>&lt;h2 id="tldr"&gt;
 TL;DR
 &lt;a class="anchor" href="#tldr"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;&lt;strong&gt;All data is in memory.&lt;/strong&gt; Each memory has an &lt;strong&gt;address&lt;/strong&gt; and a &lt;strong&gt;value&lt;/strong&gt;.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Pointers are an abstraction of a data address.&lt;/strong&gt; (Because C does no bounds checking on pointer arithmetic, the model described here is the direct enabler of the attacks studied in [[cs161/Memory Safety Vulnerabilities]].)&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Use &lt;code&gt;*&lt;/code&gt; to get a value from a pointer.&lt;/li&gt;
&lt;li&gt;Use &lt;code&gt;&amp;amp;&lt;/code&gt; to get the address of a value.&lt;/li&gt;
&lt;/ul&gt;
&lt;h2 id="memory"&gt;
 Memory
 &lt;a class="anchor" href="#memory"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;In C, all memory is in one single, large array of bytes&lt;/p&gt;</description></item><item><title>Memory Management</title><link>https://notes.bencuan.me/cs61c/Memory-Management/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Memory-Management/</guid><description>&lt;h2 id="main"&gt;
 Main
 &lt;a class="anchor" href="#main"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;&lt;code&gt;int main(int argc, char *argv[])&lt;/code&gt;&lt;/p&gt;
&lt;h3 id="arguments"&gt;
 Arguments
 &lt;a class="anchor" href="#arguments"&gt;#&lt;/a&gt;
&lt;/h3&gt;
&lt;p&gt;&lt;code&gt;argc&lt;/code&gt; contains the &lt;strong&gt;number of strings&lt;/strong&gt; inputted. The executable is one, and each argument is one.&lt;/p&gt;
&lt;p&gt;&lt;code&gt;argv&lt;/code&gt; is a pointer to an array with the argument strings. Can also be represented as &lt;code&gt;char **argv&lt;/code&gt;&lt;/p&gt;
&lt;h2 id="memory-management"&gt;
 Memory Management
 &lt;a class="anchor" href="#memory-management"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;![[/cs61c/img/Memory-Management/Untitled.png]]&lt;/p&gt;
&lt;h3 id="the-stack"&gt;
 The Stack
 &lt;a class="anchor" href="#the-stack"&gt;#&lt;/a&gt;
&lt;/h3&gt;
&lt;p&gt;The stack contains local variables (exist inside functions).&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Grows from the top down&lt;/li&gt;
&lt;li&gt;Last in first out (LIFO)&lt;/li&gt;
&lt;li&gt;Memory is freed when the function returns.&lt;/li&gt;
&lt;li&gt;&lt;code&gt;main()&lt;/code&gt; is treated like a function&lt;/li&gt;
&lt;li&gt;Automatic memory management: deleted without manual deletion&lt;/li&gt;
&lt;li&gt;A new &lt;strong&gt;stack frame&lt;/strong&gt; gets created every time a new function is called
&lt;ul&gt;
&lt;li&gt;Return address (parent)&lt;/li&gt;
&lt;li&gt;Arguments&lt;/li&gt;
&lt;li&gt;Local variables&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;/ul&gt;
&lt;h3 id="the-heap"&gt;
 The Heap
 &lt;a class="anchor" href="#the-heap"&gt;#&lt;/a&gt;
&lt;/h3&gt;
&lt;p&gt;The heap contains memory that is specifically requested. It grows dynamically upwards.&lt;/p&gt;</description></item><item><title>Floating Point</title><link>https://notes.bencuan.me/cs61c/Floating-Point/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Floating-Point/</guid><description>&lt;h2 id="some-number-representations"&gt;
 Some Number Representations
 &lt;a class="anchor" href="#some-number-representations"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;h3 id="first-some-cool-bit-stuffs"&gt;
 First, some cool bit stuffs
 &lt;a class="anchor" href="#first-some-cool-bit-stuffs"&gt;#&lt;/a&gt;
&lt;/h3&gt;
&lt;ul&gt;
&lt;li&gt;Easy way to check equality of &lt;code&gt;x&lt;/code&gt; and &lt;code&gt;y&lt;/code&gt;: &lt;code&gt;x - y == 0&lt;/code&gt; or &lt;code&gt;x ^ y == 0&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;Logical vs. arithmetic right shift:
&lt;ul&gt;
&lt;li&gt;Logical doesn&amp;rsquo;t preserve leftmost bit (always just adds 0 to the end)&lt;/li&gt;
&lt;li&gt;Arithmetic preserves most significant bit (so that it&amp;rsquo;s better for Two&amp;rsquo;s complement)&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;li&gt;Left shift to multiply by 2&lt;/li&gt;
&lt;li&gt;Right shift to divide by 2&lt;/li&gt;
&lt;/ul&gt;
&lt;h3 id="alternative-representations"&gt;
 Alternative representations
 &lt;a class="anchor" href="#alternative-representations"&gt;#&lt;/a&gt;
&lt;/h3&gt;
&lt;p&gt;&lt;strong&gt;Sign/Magnitude representation:&lt;/strong&gt; The most significant bit is always the sign, no numerical information is stored here. (Different from Two&amp;rsquo;s complement in that there are now two zeroes, and the ranges of positive and negative numbers are symmetric)&lt;/p&gt;</description></item><item><title>RISC-V</title><link>https://notes.bencuan.me/cs61c/RISC-V/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/RISC-V/</guid><description>&lt;h1 id="quick-reference"&gt;
 Quick Reference
 &lt;a class="anchor" href="#quick-reference"&gt;#&lt;/a&gt;
&lt;/h1&gt;
&lt;p&gt;[[RISC-V Quick Reference]]&lt;/p&gt;
&lt;h1 id="intro-to-assembly-language"&gt;
 Intro to Assembly Language
 &lt;a class="anchor" href="#intro-to-assembly-language"&gt;#&lt;/a&gt;
&lt;/h1&gt;
&lt;p&gt;![[/cs61c/img/RISC-V/Untitled.png]]&lt;/p&gt;
&lt;p&gt;Assembly Language is one level closer to the hardware than most programming languages. It has human-readable instructions (add, etc), which directly correspond to numerical representations in machine code.&lt;/p&gt;
&lt;h2 id="instruction-set-architecture-isa"&gt;
 Instruction Set Architecture (ISA)
 &lt;a class="anchor" href="#instruction-set-architecture-isa"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;The job of a CPU is to execute &lt;strong&gt;instructions,&lt;/strong&gt; which are primitive operations. Each instruction is simple and does a small amount of work, but if we chain together many instructions, we can create a program.&lt;/p&gt;</description></item><item><title>CALL</title><link>https://notes.bencuan.me/cs61c/CALL/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/CALL/</guid><description>&lt;p&gt;![[/cs61c/img/CALL/Untitled 2.png]]&lt;/p&gt;
&lt;h2 id="the-language-execution-continuum"&gt;
 The Language Execution Continuum
 &lt;a class="anchor" href="#the-language-execution-continuum"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;![[/cs61c/img/CALL/Untitled.png]]&lt;/p&gt;
&lt;p&gt;As languages get more high level, they tend to become easier to write but run more slowly.&lt;/p&gt;
&lt;p&gt;An &lt;strong&gt;interpreter&lt;/strong&gt; is a program that executes other programs. Higher level languages are less efficient to interpret since they optimize for readability or accessibility rather than performance.&lt;/p&gt;
&lt;p&gt;One alternative to interpreting is &lt;strong&gt;translation,&lt;/strong&gt; which is when a high level language is converted into a lower level language.&lt;/p&gt;</description></item><item><title>Hardware Design</title><link>https://notes.bencuan.me/cs61c/Hardware-Design/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Hardware-Design/</guid><description>&lt;h1 id="synchronous-digital-systems"&gt;
 Synchronous Digital Systems
 &lt;a class="anchor" href="#synchronous-digital-systems"&gt;#&lt;/a&gt;
&lt;/h1&gt;
&lt;p&gt;&lt;strong&gt;Synchronous:&lt;/strong&gt; there is a &lt;strong&gt;fixed global clock&lt;/strong&gt; that determines the rate at which everything runs.&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Asynchronous systems are insanely difficult to debug so we don&amp;rsquo;t use them (yet).&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;strong&gt;Digital:&lt;/strong&gt; made up of discrete 1&amp;rsquo;s and 0&amp;rsquo;s (unlike analog systems, which are a range).&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;High voltage is 1 (true, asserted), low voltage is 0 (false, unasserted).&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Synchronous Digital Systems consist of two basic types of circuits:&lt;/p&gt;</description></item><item><title>RISC-V Processor Datapath</title><link>https://notes.bencuan.me/cs61c/RISC-V-Processor-Datapath/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/RISC-V-Processor-Datapath/</guid><description>&lt;h2 id="the-state"&gt;
 The State
 &lt;a class="anchor" href="#the-state"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;Each instruction reads and updates the state during execution. The state includes:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Registers (x0 to x31)
&lt;ul&gt;
&lt;li&gt;Find rs1 and rs2&lt;/li&gt;
&lt;li&gt;Write to rd (destination)&lt;/li&gt;
&lt;li&gt;Writes to x0 are ignored&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;li&gt;Program counter (PC)
&lt;ul&gt;
&lt;li&gt;Holds address of current instruction&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;li&gt;Memory (MEM)
&lt;ul&gt;
&lt;li&gt;Holds both instructions and data in a 32-bit byte addressed memory space&lt;/li&gt;
&lt;li&gt;Separate memory for instructions (IMEM) and data (DMEM)&lt;/li&gt;
&lt;li&gt;Instructions are read from IMEM, load and store instructions access DMEM&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;![[/cs61c/img/RISC-V-Processor-Datapath/Untitled.png]]&lt;/p&gt;</description></item><item><title>Caching</title><link>https://notes.bencuan.me/cs61c/Caching/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Caching/</guid><description>&lt;h1 id="the-problem"&gt;
 The Problem
 &lt;a class="anchor" href="#the-problem"&gt;#&lt;/a&gt;
&lt;/h1&gt;
&lt;p&gt;Over time, the processor-DRAM latency gap has been increasing, such that instructions relying on DRAM access greatly reduce the number of instructions that can be processed, and therefore the overall performance of a CPU.&lt;/p&gt;
&lt;p&gt;![[/cs61c/img/Caching/Untitled.png]]&lt;/p&gt;
&lt;h1 id="a-solution-caching"&gt;
 A Solution: Caching
 &lt;a class="anchor" href="#a-solution-caching"&gt;#&lt;/a&gt;
&lt;/h1&gt;
&lt;p&gt;Since programs only care about a very small subset of the total information available, if we identify this subset and place it into more local memory, then we can efficiently perform most memory accesses.&lt;/p&gt;</description></item><item><title>Operating Systems</title><link>https://notes.bencuan.me/cs61c/Operating-Systems/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Operating-Systems/</guid><description>&lt;h2 id="introduction"&gt;
 Introduction
 &lt;a class="anchor" href="#introduction"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;The OS is a large piece of software that acts as a layer between hardware and user programs. Some of its functions include: (For a much deeper treatment of every topic on this page — processes, threads, scheduling, virtual memory, file systems — see the CS 162 notes, starting with [[cs162/Chapter 1 OS Basics]].)&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Loading on boot&lt;/li&gt;
&lt;li&gt;Managing IO devices via drivers&lt;/li&gt;
&lt;li&gt;Starts services for managing filesystems, network, etc.&lt;/li&gt;
&lt;li&gt;Loads, runs, and manages multiple programs and resources simultaneously and safely&lt;/li&gt;
&lt;li&gt;Mediates interactions between running programs, processes, and hardware&lt;/li&gt;
&lt;li&gt;Makes interaction with the outside world uniform, even if the underlying hardware may be different&lt;/li&gt;
&lt;/ul&gt;
&lt;h2 id="safe-sharing-of-resources"&gt;
 Safe Sharing of Resources
 &lt;a class="anchor" href="#safe-sharing-of-resources"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;The OS gives each process &lt;strong&gt;isolation&lt;/strong&gt;: even though multiple processes might need to share hardware, each process gets its own view that it owns the whole machine:&lt;/p&gt;</description></item><item><title>Parallelism</title><link>https://notes.bencuan.me/cs61c/Parallelism/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Parallelism/</guid><description>&lt;h2 id="using-parallelism-for-performance"&gt;
 Using Parallelism for Performance
 &lt;a class="anchor" href="#using-parallelism-for-performance"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;In recent times, the performance improvements with single-threaded performance have been small, and CPU clock rates are no longer increasing. Therefore, we must turn to parallel processing to improve speed.&lt;/p&gt;
&lt;p&gt;There are two main ways to do so:&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Multiprogramming:&lt;/strong&gt; Run multiple programs at the same time. This is how multi-core systems work (e.g. use one core for one program, another core for another). This is handled by the OS and is relatively easy to handle.&lt;/p&gt;</description></item><item><title>Dependability</title><link>https://notes.bencuan.me/cs61c/Dependability/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Dependability/</guid><description>&lt;h1 id="dependability-via-redundancy"&gt;
 Dependability via Redundancy
 &lt;a class="anchor" href="#dependability-via-redundancy"&gt;#&lt;/a&gt;
&lt;/h1&gt;
&lt;h2 id="redundancy-of-time-and-space"&gt;
 Redundancy of Time and Space
 &lt;a class="anchor" href="#redundancy-of-time-and-space"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;&lt;strong&gt;Spatial Redundancy:&lt;/strong&gt; replicating data across machines, or storing extra information or hardware to handle failures&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Temporal Redunancy:&lt;/strong&gt; Retrying an operation in the hopes that it was a transient (soft) failure&lt;/p&gt;
&lt;h2 id="dependability-measures"&gt;
 Dependability Measures
 &lt;a class="anchor" href="#dependability-measures"&gt;#&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;Mean time to Failure (MTTF): Reliability&lt;/p&gt;
&lt;p&gt;Mean Time to Repair (MTTR): Service interruption&lt;/p&gt;
&lt;p&gt;Mean Time Between Failures (MBTF) = MTTF + MTTR&lt;/p&gt;
&lt;p&gt;Availability: MTTF / (MTTF + MTTR)&lt;/p&gt;</description></item><item><title/><link>https://notes.bencuan.me/cs61c/CS61C-Index/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/CS61C-Index/</guid><description>&lt;p&gt;[[Number Representation]] - bits are bits! Two&amp;rsquo;s complement, binary math
[[Intro to C]] - C syntax and motivation.
[[Memory, Pointers, Addresses]] - What are pointers, and how do we use them in C?
[[Memory Management]] - Stack, heap, alignment, and endianness.
[[Floating Point]] - The IEEE Floating Point Standard, and how to convert between it and decimal.
[[RISC-V]] - Intro to RISC-V syntax and assembly.
[[CALL]] - Compiler, Assembler, Linker, Loader chain.
[[Hardware Design]] - Logic gates, transistors, registers, boolean algebra.
[[RISC-V Processor Datapath]] - How hardware is designed to process assembly instructions.
[[Caching]] - Creating and analyzing caches and their performance.
[[Operating Systems]] - high level introduction to OS&amp;rsquo;s, networking, IO, and virtual memory.
[[Parallelism]] - SIMD, OpenMP, MOESI caches, Flynn Taxonomy.
[[Dependability]] - Error correcting and RAID.&lt;/p&gt;</description></item><item><title>Exam Problem Guide</title><link>https://notes.bencuan.me/cs61c/Exam-Problem-Guide/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/Exam-Problem-Guide/</guid><description>&lt;h1 id="number-representation"&gt;
 Number Representation
 &lt;a class="anchor" href="#number-representation"&gt;#&lt;/a&gt;
&lt;/h1&gt;
&lt;ul&gt;
&lt;li&gt;
&lt;p&gt;&lt;strong&gt;Convert -29 to Two&amp;rsquo;s Complement binary and -127 biased binary. (8 bits)&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Two&amp;rsquo;s Complement:&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;First, represent +29 in binary with an extra sign bit:&lt;/p&gt;
&lt;p&gt;&lt;code&gt;0b00011101&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;Now, negate all bits:&lt;/p&gt;
&lt;p&gt;&lt;code&gt;0b11100010&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;Add one:&lt;/p&gt;
&lt;p&gt;&lt;code&gt;0b11100011&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Biased:&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;First, add 127 to -29 to get 98.&lt;/p&gt;
&lt;p&gt;Represent 98 in binary:&lt;/p&gt;
&lt;p&gt;&lt;code&gt;0b01100010&lt;/code&gt;&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p&gt;&lt;strong&gt;Number Representation Facts&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;A $n$ digit two-complement number stores $2^n$ negative numbers and $2^{n-1}$ positive numbers.&lt;/p&gt;
&lt;p&gt;![[/cs61c/img/Exam-Problem-Guide/Untitled.png]]&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p&gt;&lt;strong&gt;Endianness&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Supposing we have a 32-bit integer &lt;code&gt;a = 0xABCD_EFGH&lt;/code&gt;.&lt;/p&gt;</description></item><item><title>RISC-V Quick Reference</title><link>https://notes.bencuan.me/cs61c/RISC-V-Quick-Reference/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://notes.bencuan.me/cs61c/RISC-V-Quick-Reference/</guid><description>&lt;p&gt;![[/cs61c/img/RISC-V-Quick-Reference/Untitled.png]]&lt;/p&gt;
&lt;p&gt;![[/cs61c/img/RISC-V-Quick-Reference/Untitled 1.png]]&lt;/p&gt;
&lt;p&gt;![[/cs61c/img/RISC-V-Quick-Reference/Untitled 2.png]]&lt;/p&gt;
&lt;p&gt;![[/cs61c/img/RISC-V-Quick-Reference/Untitled 3.png]]&lt;/p&gt;
&lt;p&gt;![[/cs61c/img/RISC-V-Quick-Reference/Untitled 4.png]]&lt;/p&gt;
&lt;p&gt;![[/cs61c/img/RISC-V-Quick-Reference/Untitled 5.png]]&lt;/p&gt;
&lt;p&gt;![[/cs61c/img/RISC-V-Quick-Reference/Untitled 6.png]]&lt;/p&gt;
&lt;h3 id="opcodes"&gt;
 opcodes
 &lt;a class="anchor" href="#opcodes"&gt;#&lt;/a&gt;
&lt;/h3&gt;
&lt;ul&gt;
&lt;li&gt;R: &lt;code&gt;0110011&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;I: &lt;code&gt;0010011&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;S: &lt;code&gt;0100011&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;B: &lt;code&gt;1100011&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;h3 id="registers"&gt;
 registers
 &lt;a class="anchor" href="#registers"&gt;#&lt;/a&gt;
&lt;/h3&gt;
&lt;p&gt;![[/cs61c/img/RISC-V/Untitled 5.png]]&lt;/p&gt;
&lt;p&gt;Registers&lt;/p&gt;
&lt;p&gt;![[/cs61c/img/RISC-V-Quick-Reference/Untitled 7.png]]&lt;/p&gt;
&lt;p&gt;Example instruction&lt;/p&gt;
&lt;h3 id="j-vs-jr-vs-jal-vs-jalr"&gt;
 j vs jr vs jal vs jalr
 &lt;a class="anchor" href="#j-vs-jr-vs-jal-vs-jalr"&gt;#&lt;/a&gt;
&lt;/h3&gt;
&lt;p&gt;&lt;code&gt;j label&lt;/code&gt; is a pseudoinstruction for &lt;code&gt;jal x0, label&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;ret = jr ra = jalr x0, ra, 0&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;jal ra, label&lt;/code&gt; calls function within $2^{18}$ instructions of PC&lt;/p&gt;</description></item></channel></rss>